Cadence Design Systems, Inc. has released update of the Incisive functional verification platform, its multi-language simulation fuels testbench automation, low-power, metric driven verification, and mixed-signal verification.

Incisive Enterprise Simulator (IES) provides the most comprehensive IEEE language support with unique capabilities supporting the intent, abstraction, and convergence needed to speed silicon realization. IES is the core engine for low-power verification working closely with Conformal LP, the digital engine for mixed-signal verification working with Virtuoso simulators, the testbench engine for simulation acceleration with Xtreme and Palladium, and the RTL engine working with TLM verification solutions.