Synopsys, Inc., a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, has released vL-2016.06 version of SpyGlass is early design analysis tools enable efficient verification and optimization of SoC Designs.

Synopsys Verification Continuum is a comprehensive verification platform built from the industry’s fastest engines for virtual prototyping, static and formal verification, simulation, emulation, FPGA-based prototyping and debug. Verification Continuum features Unified Compile based on VCS for a simulation-like use model throughout the verification flow, enabling faster design bring-up, seamless transitions between simulation, emulation and prototyping. It also delivers Unified Debug with Verdi to provide a debug continuum across all domains and abstraction levels enabling dramatic increases in debug efficiency. The Synopsys Verification Continuum also includes comprehensive planning and coverage as well as a multi-platform, verification IP solutions. This platform is collectively complemented by low power and analog/mixed-signal technology, integration and flows.

Using many advanced algorithms and analysis techniques, the SpyGlass platform provides designers with insight about their design, early in the process at RTL. It functions like an interactive guidance system for design engineers and managers, finding the fastest and least expensive path to implementation for complex SoCs.